PRICE : US$950
*Prices subject to change without notice.

To order, please send us an email Order

Overview

The Signal Ranger MK2 is a fixed point DSP board featuring a 300 MHz TMS320C5502 DSP, a 400 kgates SPARTAN 3 FPGA and a high-speed USB 2 interface, providing fast communications to the board. The Windows driver allows the connection of any number of boards to a PC.

The DSP board may be used while connected to a PC, providing a mean of exchanging data and commands between the PC and DSP in real-time (ideal for advanced dedicated instrumentation). It may also be used in stand-alone mode, executing embedded DSP code.

Given its very flexible resources (DSP + FPGA) and the fact that it can work as a stand-alone board, the Signal Ranger MK2 board may be used in many applications. The Signal Ranger MK2 DSP board can be used with the expansion board SR2_Analog_16 which adds 16 ADCs and DACS (16-bits). Along with this expansion board, our Signal Ranger MK2 DSP board is a cost-effective solution for multi-channel DSP applications.

Applications

• Multi-channel speech and audio acquisition and processing
• Multi-channel control
• Instrumentation and measurement
• Vibro-acoustic analysis
• Acoustic array processing/beamforming
• DSP software development

Accessories

• SR2_Analog_16 (expansion board)

Key Features and Benefits

• Cost-effective solution for multi-channel audio applications (with the optional SR2_Analog_16 expansion board).
  
  
• Includes a powerful 400 kgates Spartan 3 FPGA from Xilinx providing 63 digital I/Os for general purposes and hardware interface.
  
  
• High-speed USB 2.0 port allows the transfer of real-time data to/from the PC.
  
  
• Two boot modes (stand-alone and PC) are accessible without using any jumpers. Even when the DSP board has booted in stand-alone mode, the PC may be connected at any time to read/write DSP memory without interrupting the already executing DSP code.
  
  
• Unique software tools that allow a seamless transition from the development/debugging phase to the deployed application phase without any performance compromise.
  
  
• DSP JTAG connector. With the addition of a JTAG emulator (not included), it allows complete emulation from the Code-Composer-Studio environment.
  
  
• The board features a dedicated USB 2.0 controller. The DSP is free from all USB protocol management tasks. Furthermore, in this architecture, the USB controller is master, allowing the PC to positively take control of the board in any circumstance, even after the DSP code has crashed.

Software Development Tools

• Driver for Win2K and WinXP: This driver allows the connection of any number of boards to the PC.
  
  
• Full-Featured Symbolic Debugger: The debugger includes features such as real-time graphical data plotting, symbolic read/write access to variables, dynamic execution, Flash programming, etc. As its core, the mini-debugger uses the same interface libraries that a developer uses to design a stand-alone DSP application. This insures a seamless transition from the development/debugging environment to the deployed application.
  
  
• Labview Interface: This library of LabVIEW VIs allows the development of LabVIEW code to interface with the DSP board. It includes VIs to download DSP code (COFF loader), launch DSP functions, and read/write DSP memory while the DSP code is executing.
  
  
• C/C++ Interface: This DLL allows the development of PC code written in C/C++ to interface with the DSP board. They include functions to download DSP code (COFF loader), launch DSP functions, and read/write DSP memory while DSP code is executing.
  
  
• Self-test Application: This application tests all the hardware on the DSP board.
  
  
• Code Examples: Two demo LabVIEW applications exemplify the development of DSP code in C and in assembly. It also shows how to interface this code to a PC application written in LabVIEW. One demo Visual Studio application exemplifies the development of a PC application written in C/C++.
  
  
• Flash Driver and Example Code: This driver includes all the code to configure and use the on-board 2 Mbytes Flash ROM from within user DSP code.
  
  
• Factory-Default FPGA Configuration: The board is provided with a factory default FPGA configuration, which provides 63 configurable digital I/Os.

Architecture and Boot Modes

The Signal Ranger MK2 board includes a 1M word Flash ROM, from which the DSP may boot. Furthermore, the Flash may also contain the configuration code of the FPGA, allowing the DSP to initialize the FPGA with its logic as part of the initial boot process.

There are two ways the DSP can boot:

• Stand-alone boot: At power-up, the USB controller in stand-alone configuration takes control of the DSP and FPGA. It loads a communication kernel into DSP RAM and executes it. This kernel then looks in Flash memory for an FPGA logic description file. If it finds it, it loads the FPGA. It then looks further in Flash memory for DSP code. If it finds it, it loads it into RAM and executes it. By pre-programming the Flash memory with FPGA logic and DSP code, the board can work in stand-alone mode, executing an embedded DSP application directly from power-up.
  
  
• PC boot: After the board has been connected to a PC, the PC may force the DSP to reboot. In this mode, the PC may force the reloading of new FPGA logic and DSP code. This mode may be used to "take control" of the DSP at any time. In particular, it may be used to reprogram the Flash memory in a completely transparent manner, without using any jumpers.

Even when the DSP board has booted in stand-alone mode, the PC may be connected at any time to read/write DSP memory without interrupting the already executing DSP code. These functions may be used to provide real-time visibility into, or send commands to the executing embedded DSP code.

Powerful Processing

The Signal Ranger MK2 DSP board features a TMS320C5502 running at 300 MHz. The DSP provides high-performances and low-power consumption. It includes two multipliers, which allows up to 600 million multiply-accumulates per second. The 5502 has two ALUs: a central 40-bits arithmetic/logic unit (ALU) and an additional 16-bits ALU. These features allow an efficient implementation of advanced signal processing such as FIR filters, IIR filters, FFTs, LMS algorithm and various math functions. The 400 kgates Spartan 3 FPGA includes 16 dedicated 18 x 18 multipliers, which may be used for co-processing.